Cluster Technology

Cluster Architecture

The test system cluster architecture is based on dual CPU or 4-CPU PCs acting as cluster nodes. The nodes communicate and synchronise over a high-speed network (Myrinet or InfiniBand). A modification of the Linux operating system allows to run the test execution and evaluation algorithms in hard real-time on reserved CPUs, where scheduling is non-preemptive and controlled by the test system itself. The interrupts caused by interfaces to the system under test may be relayed to CPUs designated explicitly for their handling. This approach offers the opportunity to utilise high-performance standard hardware and the services provided by the widely accepted Linux operating system in combination with all mechanisms required for hard real-time computing. The cluster architecture presents an opportunity to distribute interfaces with high data throughput on different nodes, so that PCI bus overload can be avoided. In addition, the CPU load can be balanced by allocating test data generators, environment simulations and checkers for the behaviour of the system under test (“test oracles”) on dedicated CPUs.

Technical data

Supported Interfaces

AFDX, CAN, ARINC 429, Digital I/O, Analog I/O (incl. NTC, PTx), Analog Signal FFT, MIL-STD 1553, Ethernet, FireWire, Profibus, RS232, RS485, Parallel etc.

Scheduling accuracy

3 microseconds

Cluster communication

Node-to-node communication latency < 50 microseconds, 10 GBit/s InfiniBand (copper) or 2GBit/s full duplex Myrinet (fiber)

Response time for selected I/O types

Discrete output toggle 70 microseconds, Discrete input detection 85 microseconds, Analog output change 50 microseconds.

Specialised hardware

Made-to-measure fault-insertion units (line-resistance, inter-wire faults, short-circuits etc.)

View some pictures of test engine hardware...